Nanostructures and CMOS circuits for information processing using noise
- Stochastic associative processing and a clustering algorithm using it
Stochastic associative processor architecture
Clustering using stochastic associative processing
Performance comparison with other clustering methods
(vertical axis represent average distortion ratio.)
- Nano-dot structure using a pricple of thermal-noise assisted tunneling
- CMOS LSI emulator for stochastic associative processing
LSI architecture
Chip photograph
Measurement results for stochastic association of digit numbers
- CMOS LSI emulator for stochastic associative processing and clustering
Chip photograph (upper right part)
- Spiking neuron model using multi-nano-dot structures
